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Metamodeling-Driven IP Reuse for SoC Integration and Microprocessor Design

Metamodeling-Driven IP Reuse for SoC Integration and Microprocessor Design

Copyright: 2009
Pages: 330
ISBN: 9781596934245
Coming Soon: Available 11/30/2010

Print Book £110.00 Qty:
eBook £104.00
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This cutting-edge resource offers you an in-depth understanding of metamodeling approaches for the reuse of intellectual properties (IPs) in the form of reusable design or verification components. The books covers the essential issues associated with fast and effective integration of reusable design components into a system-on-a-chip (SoC) to achieve faster design turn-around time. Moreover, it addresses key factors related to the use of reusable verification IPs for a write once, use many timesù verification strategy - another effective approach that can attain a faster product design cycle.
Preface ; Acknowledgments ; Introduction - Ongoing Efforts in Design IP Reuse. Ongoing Efforts in Verification IP Reuse. Essential Issues with IP Reuse. Metamodeling Approach to Reuse. Problem Statement. Research Contributions. Tools and Techniques Developed. ; Background - Metamodeling. Component Composition Framework. Reflection and Introspection (R-I). SystemC. Model-Driven Validation. Test Generation. Coverage-Directed Test Generation.; Related Work - Component Composition Framework. Component-Based Software Design Environments. IP Interfacing Standards. Existing Tools for Structural Reflection. Architecture Description Languages. Test Generation. ; A Metamodel for Component Composition - CC Language, Metamodel, and Model. CC Analysis and Translation. Case Studies. Design Experience and Summary. ; IP Reflection and Selection - Metadata for IP Composition. Metadata on a SystemC IP Specification. Tools and Methodology. IP Selection. Case Study. Summary. ; Typing Problems in IP Composition - MCF Type Definitions. Type Resolution in MCF. Comparative Study. Case Study. Summary. ; IP Composition - MCF Ingredients. Handling Generic IPs. Interaction Pattern. Case Study. Summary. ; Checker Generation for IP Verification - Enhanced Design Flow. Enhanced Modeling Framework. Interaction Console. Conclusion.; A Metamodel for Microprocessors - Modeling and Validation Environment (MMV). Simulator Generation. Test Generation. Case Study: Modeling Vespa in MMV. Summary. ; Design Fault Directed Test Generation - Motivation. Modeling and Test Generation. Coverage Constraints. Results. Summary. ; Model-Driven System-Level Validation - Test Generation Methodology. SystemC Validation. Case Study. Summary. ; Conclusion and Future Work - Summary. Future Work. ; About the Authors. Index ;
  • Deepak A. Mathaikutty Deepak Abraham Mathaikutty works in the Microarchitecture Research Laboratory at Intel Corporation. He holds an M.S. and Ph.D. in computer engineering from the Virginia Polytechnic Institute and State University.
  • Sandeep Shukla Sandeep Shukla is an associate professor at the Virginia Polytechnic Institute and State University. He holds an M.S. and Ph.D. in computer science from the State University of New York at Albany.
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